TransWarp GS: Difference between revisions

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On [http://a2central.com/1101/gse-reactivecom-to-offer-transwarp-gs-upgrades-close-to-cloning-entire-accelerator/ January 27th, 2006 Henry announced on CSA2] the successful cracking and copying of the TranWarp GS GALs, and their release for sale and download.
On [http://a2central.com/1101/gse-reactivecom-to-offer-transwarp-gs-upgrades-close-to-cloning-entire-accelerator/ January 27th, 2006 Henry announced on CSA2] the successful cracking and copying of the TranWarp GS GALs, and their release for sale and download.
== GAL Upgrades ==
For 16MHz and above the following is required for correct IIgs operation.
* 32k Cache Board with 1.8s firmware.
* GAL1A, 7ns speed grade (PN: GAL16V8D-7LP)

Revision as of 08:34, 29 August 2017

What Are GALs

The Generic Array Logic (also known as GAL) device was an innovation of the PAL (Programmable Array Logic) and was invented by Lattice Semiconductor. The GAL was an improvement on the PAL, which itself was an improvement on standard Gate Locig ICs like the 74-series. A GAL can emulate many PALs and 74-series ICs in one device, saving cost, power, and PCB real estate. Its primary benefit, however, was that it was eraseable and re-programmable, making prototyping and design changes easier for engineers. AE used a set of 8 GALs on the TransWarp GS.


AE's GAL Markings

AE sometimes used the part number suffix "N" and other times they used "I". "N" labeled parts have a "-" separating them, whereas the early "I" labeled parts have a "-" for separation and later used ".". It is not clear why the differences in suffixes. However there does not seem to be a difference in the way the GALs are programed. This separation and suffix change was product wide and not limited to the TransWarp GS. The differences could have been from when Don Pote sold AE to a new owner in the early 1990's.

The earliest GALs have a "-I" suffix, and all "labels" are silk screen printed to the GALs. It appears most TransWarp GS boards AE date coded from early 1989 have GAL date codes from 1988 and/or 1989. The earliest production boards would have an "A" revision for GAL3. GAL3 revision "B" is a lot more common for early boards, and usually the GALs all have a 1989 date code on them. However in early 1990 AE changed how they labeled their GALs and the "-N" marking made an appearance on a mylar type label. In mid 1990 there are examples of ".I" suffix appearing, and also AE relabeling old GALs or ever over labeling GALs. See the last pic on the right before for these two examples.

GALs were also user upgradeable and therefore some users were know to have replaced them in order to address early CPU bugs or issues between the different IIgs ROM versions. This could explain some of the mix of different labels found.

GAL Versions And Speed Grades

GALs 1-2, 6-8 are "GAL16V8" or "GAL16V8A". GALs 3-5 are "GAL20V8" or "GAL20V8A". Lattice Semiconductor found flaws in the GALs security and in early 1989 started to address these issues with the "A" redesign. This is not to be confused with AE's programming revision lettering.

GAL 1 and 2 were always 15ns speed grade. These two GAL connect directly to the oscillator and need to be as fast as possible. The 15ns speed grade is only good to Mhz. 7ns speed grade seem to be good to 18+MHz.

GAL 3 to 5 were always 25ns speed grade.

GAL 6 to 8 were usually 25ns speed grade, but were sometimes the faster 15ns speed grade on later dated TransWarp GS boards.

Why Different GAL Versions

Mostly we do not know for sure what the different GAL revisions do beside allow for a reduction in overall ICs used while allowing for simple redesign of the board's function or connections. They also seem to be used for addressing bug fixes.

The only known GAL is 2 revision "B", and this was a DMA fix Applied Engineering issued. It is an absolute requirement for the TranWarp GS to work at all with at least some RamFAST SCSI boards (e.g. the revision "C" boards). RamFAST revision "D" does not require the 2B GAL.

GAL 3 is know simply by experiment and observation. It is believed this GAL was to deal with the bugs in the original 65815 CPU die. Revision "E" addresses the newer 65816 CPU die redesign and is required for correct operation with the new WDC CPUs and v1.8s of the firmware on the 32k Cache Card. Older CPUs will NOT work correctly with revision "E". The revisions "E" GAL does not work correctly with the old CPUs. Revision "E" is required for above 10MHz operation.

No original GAL source code has been found to date. Without documented source we will never know the reasons for the revisions.

On January 27th, 2006 Henry announced on CSA2 the successful cracking and copying of the TranWarp GS GALs, and their release for sale and download.


GAL Upgrades

For 16MHz and above the following is required for correct IIgs operation.

  • 32k Cache Board with 1.8s firmware.
  • GAL1A, 7ns speed grade (PN: GAL16V8D-7LP)