No-Slot Clock: Difference between revisions
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Theory of Operation: The /CE (Chip Enable) signal from the system's DIP Socket passes through the DS1215 Clock IC (in Pin11, out pin10). When the DS1215 Clock IC recognizes a certain sequence of bits on A0 (Pin6) and A2 (Pin3) the ROM's /CE pin is held high by the DS1215 Clock IC and is in essence "disconnected" from the system's data bus. This allows the No-Slock Clock's software to communicate directly with the DS1215 Clock IC without the ROM interfering. | Theory of Operation: The /CE (Chip Enable) signal from the system's DIP Socket passes through the DS1215 Clock IC (in Pin11, out pin10). When the DS1215 Clock IC recognizes a certain sequence of bits on A0 (Pin6) and A2 (Pin3) the ROM's /CE pin is held high by the DS1215 Clock IC and is in essence "disconnected" from the system's data bus. This allows the No-Slock Clock's software to communicate directly with the DS1215 Clock IC without the ROM interfering. | ||
== Versions == <!--T:2--> | |||
v1.0 was produced about November 2014. While working with this design Henry noticed that some of the DS1215 Clock IC had issues. Some were slow. Some were fast. Some didn't advance the time at all. Henry assumed this was do to the Crystal and changed stock a few times in an attempt to resolve the issue. Henry also noticed the CR1025 Battery Holder could easily be broken off the PCB. Only a few v1.0 units were produced and mostly sent to beta testers. | |||
v1.1 was produced about January 2015. This design allowed for a more sturdy PCB mounting of the CR1025 Battery Holder. The SMT pads now covered a lot larger area and were not as easily ripped off the PCB. This design however still suffered from the same issues with keeping time as with v1.0. | |||
v1.2 was produced around April of 2015 however the design had an error. The solid pad for the /CE signal was drilled out. So this design could not work. | |||
v1.3 was produced around August of 2015 however the design also had the same error as v1.2. The CAD software used was EZ-PC CAD and it is somewhat hard to control pads and layers. Henry then switched to KiCAD and fully relaid out the design. This version is the first to sport the new "UM" logo. It also was an attempt to resolve the time keeping issue. Henry found that the length of the connection between the DS1215 Clock IC and Crystal mattered, even as short as they were on the design. There most likely was a resonance issue. Henry also added a ground shield under the Crystal. | |||
The next v1.3 version was produced around March of 2016. | |||
The designs are all very similar. They all use an SMT pad for the CR1025 Battery Holder, the Crystal, and DS1215 Clock IC. They all also offer SMT Pad for connection of an auxiliary power source. This could be supplied by soldering two .025 mil Square Pins to the connectors and using a 2x AA/AAA Battery Caddy as used with the [[IIgs Battery Candy]]. | |||
The footprint for the Crystal is designed in such a way to allow for several body styles of Crystal. 1206, 4-SMD, and Surface Mount Cylindrical Can styles can all be used. | |||
A CR1025 Battery Holder isn't available is this actual footprint on the PCB. As a result when a unit is assembled the Battery Holder is modified to fit the board. | |||
This is also the case the the SIP Header Pins used as the Socket for the ROM and that pass-through the PCB to make contact to the system's DIP Socket on the motherboard. You will notice in the pics of the PCB that one via pad is NOT drilled out. This is to isolate the /CE signal as mentioned above. During assembly Henry uses a drill to make a hole that doesn't fully pass though the board. He then clips the leg from the SIP Header pin which allows the rest of the pins to fully seat flush to the PCB while maintaining the isolation of the /CE signal. | |||
<gallery class="center" widths=150px heights=80 caption="Different Versions of the PCB> | |||
File:2014-11-29_NSC_v1.0.png|NSC v1.0 | |||
File:2015-01-22_NSC_v1.1.png|NSC v1.1 | |||
File:2015-08-15_NSC_v1.3.png|NSC v1.3 EZ-PC CAD | |||
File:2016-03-08_NSC_v1.3.png|NSC v1.3 KiCAD | |||
</gallery> | |||
== Known Design Issues == <!--T:3--> | |||
Socket Streatch |
Revision as of 11:14, 31 May 2016
The No-Slot Clock project was started about mid 2014 by Henry from ReActiveMicro, and was officially released on April 12th, 2015. It was inspiration by his work on the DClock project. This was an Ultimate-Micro release, and all newer v1.3 PCBs bare the UM logo.
History
While working on the DClock project Henry learned how phantom clocks work. With this understanding he was able to see how a new and better No-Slot Clock design could be produced.
When Henry started the No-Slot Clock project he purchased back stock of the DS1215 Clock ICs from James Littlejohn of 8bitsystem.com on June 13th, 2014. James had abandoned the DClock project and wasn't using the stock Henry had previously sold to him.
Henry then started CAD and design work for his version of the No-Slock Clock to come up with a better design that didn't use two DIP Sockets soldered together, as Dallas did with their "SmartWatch" Clock design. The reason for this is not all signals are passed from the systems data bus to the ROM or RAM IC the DS1216E No-Slock Clock is installed under.
Theory of Operation: The /CE (Chip Enable) signal from the system's DIP Socket passes through the DS1215 Clock IC (in Pin11, out pin10). When the DS1215 Clock IC recognizes a certain sequence of bits on A0 (Pin6) and A2 (Pin3) the ROM's /CE pin is held high by the DS1215 Clock IC and is in essence "disconnected" from the system's data bus. This allows the No-Slock Clock's software to communicate directly with the DS1215 Clock IC without the ROM interfering.
Versions
v1.0 was produced about November 2014. While working with this design Henry noticed that some of the DS1215 Clock IC had issues. Some were slow. Some were fast. Some didn't advance the time at all. Henry assumed this was do to the Crystal and changed stock a few times in an attempt to resolve the issue. Henry also noticed the CR1025 Battery Holder could easily be broken off the PCB. Only a few v1.0 units were produced and mostly sent to beta testers.
v1.1 was produced about January 2015. This design allowed for a more sturdy PCB mounting of the CR1025 Battery Holder. The SMT pads now covered a lot larger area and were not as easily ripped off the PCB. This design however still suffered from the same issues with keeping time as with v1.0.
v1.2 was produced around April of 2015 however the design had an error. The solid pad for the /CE signal was drilled out. So this design could not work.
v1.3 was produced around August of 2015 however the design also had the same error as v1.2. The CAD software used was EZ-PC CAD and it is somewhat hard to control pads and layers. Henry then switched to KiCAD and fully relaid out the design. This version is the first to sport the new "UM" logo. It also was an attempt to resolve the time keeping issue. Henry found that the length of the connection between the DS1215 Clock IC and Crystal mattered, even as short as they were on the design. There most likely was a resonance issue. Henry also added a ground shield under the Crystal.
The next v1.3 version was produced around March of 2016.
The designs are all very similar. They all use an SMT pad for the CR1025 Battery Holder, the Crystal, and DS1215 Clock IC. They all also offer SMT Pad for connection of an auxiliary power source. This could be supplied by soldering two .025 mil Square Pins to the connectors and using a 2x AA/AAA Battery Caddy as used with the IIgs Battery Candy.
The footprint for the Crystal is designed in such a way to allow for several body styles of Crystal. 1206, 4-SMD, and Surface Mount Cylindrical Can styles can all be used.
A CR1025 Battery Holder isn't available is this actual footprint on the PCB. As a result when a unit is assembled the Battery Holder is modified to fit the board.
This is also the case the the SIP Header Pins used as the Socket for the ROM and that pass-through the PCB to make contact to the system's DIP Socket on the motherboard. You will notice in the pics of the PCB that one via pad is NOT drilled out. This is to isolate the /CE signal as mentioned above. During assembly Henry uses a drill to make a hole that doesn't fully pass though the board. He then clips the leg from the SIP Header pin which allows the rest of the pins to fully seat flush to the PCB while maintaining the isolation of the /CE signal.
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NSC v1.0
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NSC v1.1
-
NSC v1.3 EZ-PC CAD
-
NSC v1.3 KiCAD
Known Design Issues
Socket Streatch