Design Name | A2_SD_TOP |
Fitting Status | Successful |
Software Version | P.20131013 |
Device Used | XC9572XL-10-TQ100 |
Date | 11- 3-2018, 2:38PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
24/72 (34%) | 26/360 (8%) | 10/72 (14%) | 38/72 (53%) | 34/216 (16%) |
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Signal mapped onto global clock net (GCK1) | clk_7m |
Signal mapped onto global output enable net (GSR) | n_reset |
Macrocells in high performance mode (MCHP) | 24 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 24 |